ADI AD9554BCPZ

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Overview

The AD9554BCPZ is a low loop bandwidth clock translator that provides jitter cleanup and synchronization for many systems, including synchronous optical networks (SONET/SDH). The AD9554BCPZ generates an output clock synchronized to up to four external input references. The digital PLL (DPLL) allows for reduction of input time jitter or phase noise associated with the external references. The digitally controlled loop and holdover circuitry of the AD9554BCPZ continuously generates a low jitteroutput clock even when all reference inputs have failed.

The AD9554BCPZ operates over an industrial temperature range of −40°C to +85°C. If a smaller device is needed, the AD9554-1 is a version of this device with one output per PLL. If a single or dual DPLL version of this device is needed, refer to the AD9557 or AD9559, respectively.

Features

Tray Package
Mounting Type: Surface Mount
Peak Reflow Temperature (Cel): 260
Include 1 Circuits
run the output at th range of HCSL, LVDS, LVPECL
with 72 Pins
operate supply voltage at the range of 1.8V

1.47V ~ 1.89V Voltage - Supply

Applications

There are a lot of Analog Devices Inc.
AD9554BCPZ application specific timer applications.

• Ethernet switch/router
• PCI Express 2.0/3.0
• Broadcast video/audio timing
• Processor and FPGA clocking
• Any-frequency clock conversion
• MSAN/DSLAM/PON
• Fibre Channel, SAN
• Telecom line cards
• 1 GbE and 10 GbE
• Servers, Storage, Search Acceleration