Intersil CD74ACT175E

411.5ns @ 5V, 50pF4,5 В ~ 5,5 В

Overview

This positive-edge-triggered D-type flip-flop has a direct clear (CLR)\ input. The CD74ACT175E features complementary outputs from each flip-flop.

Information at the data (D) inputs meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going edge of CLK. When CLK is at either the high or low level, the D input has no effect at the output.

Features

Applications

• Shift Registers
• Storage Registers
• Bounce elimination switch
• Data storage
• Data transfer
• Latch
• Registers
• Memory
• Frequency division
• Memory