Intersil CD74HCT163E

Двоичный счетчик14,5 В ~ 5,5 В

Overview

The CD74HCT163E is a 4-bit synchronous binary counter with parallel load capability. And high speed CMOS logic 4-Bit binary counter with synchronous eset 16-PDIP -55 to 125, including the look-ahead carry feature greatly simplifies the serial cascading of the counters. For counting to occur, both count enable inputs (PE and TE) must be set to a high state. The TE input is connected with the Q outputs of all four stages, ensuring that the terminal count (TC) output becomes high for a single clock period at the maximum count. This TC pulse serves to enable the next cascaded stage. The reset process is synchronized with the clock and takes place during the negative-to-positive transition. Both counting and parallel presetting are executed synchronously with this clock transition. When the synchronous parallel enable input (SPE) is set to a low level, it disables the counting operation and allows data at the P0 to P3 inputs to be loaded into the counter, given that the setup and hold requirements for SPE are met. Each counter possesses two count enables, PE and TE, allowing n-bit cascading. Regardless of the levels set for the SPE, PE, and TE inputs, the counter reset action will take place. As a synchronous counter IC, CD74HCT163E can be used to count clock pulses and has a synchronous parallel load input for presetting the counter to a specific value.

Available in a 16-pin DIP (Dual In-line Package)

Features

Applications

• Time-delay circuits
• Analog multiplexing and demultiplexing
• Digital multiplexing and demultiplexing
• Signal gating
• Frequency dividing circuits
• Time delay circuits
• Communications Digital Frequency Synthesizers;
• VHF, UHF, FM, AM, etc.
• Fixed or Programmable Frequency Division
• Time Out Timer for Consumer-Application Industrial Controls