Lattice GAL18V10B-20LP

ПЛИС EE10

Overview

The GAL18V10, at 7.5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide a very flexible 20-pin PLD. CMOS circuitry allows the GAL18V10B-10LP to consume much less power when compared to its bipolar counterparts. The E2 technology offers high speed (<100ms) erase times, providing the ability to reprogram or reconfigure the device quickly and efficiently.By building on the popular 22V10 architecture, the GAL18V10B-10LP eliminates the learning curve usually associated with using a new device architecture. The generic architecture provides maximum design flexibility by allowing the Output Logic Macrocell (OLMC) to be configured by the user. The GAL18V10B-10LP OLMC is fully compatible with the OLMC in standard bipolar and CMOS 22V10 devices.Unique test circuitry and reprogrammable cells allow complete AC, DC, and functional testing during manufacture. As a result, Lattice Semiconductor delivers 100% field programmability and functionality of all GAL products. In addition, 100 erase/write cycles and data retention in excess of 20 years are specified.• HIGH PERFORMANCE E2CMOS® TECHNOLOGY— 7.5 ns Maximum Propagation Delay— Fmax = 111 MHz— 5.5 ns Maximum from Clock Input to Data Output— TTL Compatible 16 mA Outputs— UltraMOS® Advanced CMOS Technology• LOW POWER CMOS— 75 mA Typical Icc• ACTIVE PULL-UPS ON ALL PINS• I²  CELL TECHNOLOGY— Reconfigurable Logic— Reprogrammable Cells— 100% Tested/100% Yields— High Speed Electrical Erasure (<100ms)— 20 Year Data Retention• TEN OUTPUT LOGIC MACROCELLS— Uses Standard 22V10 Macrocell Architecture— Maximum Flexibility for Complex Logic Designs• PRELOAD AND POWER-ON RESET OF REGISTERS— 100% Functional Testability• APPLICATIONS INCLUDE:— DMA Control— State Machine Control— High Speed Graphics Processing— Standard Logic Speed Upgrade• ELECTRONIC SIGNATURE FOR IDENTIFICATION

Features

Applications

• Address decoders
• Custom state machines
• Digital systems
• Portable digital devices
• Handheld digital devices
• Battery operated portable devices
• Complex programmable logic devices
• Digital designs
• Field programmable gate
• Address decoding