ON MC100LVEP111MNRG

Fanout Buffer (распределение), мультиплексор12:10

Overview

The MC100LVEP111MNRG is a low skew 1−to−10 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The PECL input signals can be either differential or single−ended (if the VBB output is used). HSTL inputs can be used when the LVEP111 is operating under PECL conditions. The LVEP111 specifically guarantees low output−to−output skew. Optimal design, layout, and processing minimize skew within a device and from device to device

Features

Applications

• Car
• Aviation
• Medical instruments
• Furniture
• Machine made
• Clock signal duplication
• Clock signal format conversion
• Clock signal level shifting
• High performance communication system
• Data center