ON MC74ACT273N

811нс @ 5В, 50пФ4,5 В ~ 5,5 В

Overview

The MC74AC273/74ACT273 has eight edge-triggered D-type flip-flops withindividual D inputs and Q outputs. The common buffered Clock (CP) and MasterReset (MR) inputs load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input, one setup timebefore the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop's Q output. All outputs will be forced LOW independently of Clock or Data inputs by a LOWvoltage level on the MR input. The device is useful for applications where the trueoutput only is required and the Clock and Master Reset are common to all storageelements.

Features

Applications

• Shift Registers
• Storage Registers
• Bounce elimination switch
• Data storage
• Data transfer
• Latch
• Registers
• Memory
• Frequency division
• Memory