ON NB6N14SMNG

Fanout Buffer (распределение), транслятор11:4

Overview

The NB6N14SMNG is a 3.3V 1:4 AnyLevel differential input to LVDS fan-out buffer/translator in 16 pin QFN package. This differential 1:4 clock or data receiver and will accept AnyLevel differential input signals, LVPECL, CML or LVDS. These signals will be translated to LVDS and four identical copies of clock or data will be distributed, operating up to 2GHz or 2.5Gb/s, respectively. As such, the NB6N14SMNG is ideal for SONET, GigE, fibre channel, backplane and other clock or data distribution applications. It has a wide input common mode range from GND + 50mV to VCC - 50mV. Combined with the 50 ohm internal termination resistors at the inputs, the NB6N14SMNG is ideal for translating a variety of differential or single ended clock or data signals to 350mV typical LVDS output levels.

Features

Applications

• Machine made
• Clock signal duplication
• Clock signal format conversion
• Clock signal level shifting
• High performance communication system
• Data center
• Cloud computing
• Network
• High speed industry
• High-end consumer electronics