Renesas UPD72042GT-E1-A

Overview

The µPD72042 is a microcomputer peripheral LSI device for IEBus protocol control. The µPD72042 performs all the processing required for layers 1 and 2 of the IEBus. The devices incorporate large transmission and reception buffers, allowing the microcomputer to perform IEBus operations without interruption. They also contain an IEBus driver and receiver, allowing them to directly connected to the bus directly.

Transmission speed Mode 0 Approx. 3.9 Kbps Mode 1 Approx. 17 Kbps ● Built-in IEBus driver and receiver ● Transmission and reception buffers    Transmission buffer : 33 bytes, FIFO    Reception buffer : 40 bytes, FIFO (capable of holding more than one frame of reception data.) ● Microcomputer interface Three-/two-wire serial I/O, Transfer starting with MSB ● Program crashes can be detected by means of a watchdog timer. ● Low power consumption (standby mode): 50 µA (max) ● Oscillator frequency (fX): 6 MHz   • frequency accuracy: ±1.5% ● Operating voltage: 5 V ±10%

Features