ST STM8L050J3M3TR

STM816 МГц8 КБ (8К x 8)

Overview

STM8L050J3M3TR is member of the STM8L ultra-low-power 8-bit family.

STM8L050J3M3TR features an enhanced STM8 CPU core providing increased processing power (up to 16 MIPS at 16 MHz) while maintaining the advantages of a CISC architecture with improved code density, a 24-bit linear addressing space and an optimized architecture for low-power operations. The STM8L050J3M3TR MCU includes an integrated debug module with a hardware interface (SWIM) which allows non-intrusive In-Application debugging and ultra-fast Flash programming. It features an embedded data EEPROM and low-power, low-voltage, single-supply program Flash memory. The device incorporates an extensive range of enhanced I/Os and peripherals, a 12-bit ADC, two comparators, a real-time clock, two 16-bit timers, one 8-bit timer, as well as standard communication interfaces such as an SPI, an I2C interface, and one USART. The modular design of the peripheral set allows this device to have the same peripherals that can be found in different ST microcontroller families including 32-bit families. This makes any transition to a different family very easy, supported also by the use of a common set of development tools. STM8L050J3M3TR as all the value line STM8L ultra-low-power products are based on the same architecture with the same memory mapping and a coherent pinout.

Features

• Quadrature encoder, two 16-bit timers with two channels (used as IC, OC, and PWM).

• One 7-bit prescaler and 8-bit timer

• 2 watchdogs: 1 independent and 1 window

• Beeper timer with frequencies of 1, 2, or 4 kHz.

Applications

Switching applications