Infineon PEF24902HV2.1

Overview

All timing signals are derived from a 15.36 MHz system clock. The 15.36 MHz clock can be provided by the IEC-4-AFE-X Version 3.2 by a crystal based PLL, which is synchronized to either an 8 kHz or a 2048 kHz clock at pin CLOCK. The frequency at pin CLOCK is detected automatically. 

• Serial control interface for communication with GEMINAX MAX chip set

Features