NXP CBTV24DD12ETY

SPDT2:1129 Ом1,62 В ~ 3,63 В

Overview

The CBTV24DD12 is designed for 1.8 V / 2.5 V / 3.3 V supply voltage operation and itsupports Pseudo Open Drain (POD), SSTL_12, SSTL_15 or SSTL_18 signaling and CMOS selectinput levels. This device is designed for operation in DDR4, DDR3 or DDR2 memory bussystems, with speeds up to 3200 MT/s.

The selection of the port is by a simple CMOS input (SELect). Another CMOS input (ENable) is available to allow all ports to bedisconnected. The SEL0, SEL1 and EN input signals aredesigned to operate transparently as CMOS input level signals up to 3.3 V. TheCBTV24DD12 uses NXP’s proprietary high-speed switch architecture providing highbandwidth, very little insertion loss, return loss, and very low propagation delay,allowing use in many applications requiring switching or multiplexing of high-speedsignals. It is available in a 3.0 mm × 8.0 mm TFBGA48 package with 0.65 mm ball pitch,for optimal size versus board layout density considerations. It is characterized foroperation from -10 °C to +85 °C.

Features

Applications

• Low-Voltage
• Isolation
• Medical
• Imaging
• Ultrasound
• Audio and video switching
• Automatic test equipment
• Precision data acquisition
• Battery-powered systems
• Sample-and-hold systems