NXP MC56F8367VPYE

56800E60 МГц512 КБ (256 КБ x 16)

Overview

The MC56F8367VPYE controller includes 512KB of Program Flash and 32KB of Data Flash (each programmable through the JTAG port) with 4KB of Program RAM and 32KB of Data RAM. It also supports program execution from external memory.

• JTAG/EOnCE debug programming interface

Features

? Up to 60 MIPS at 60MHz core frequency

? DSP and MCU functionality in a unified,

C-efficient architecture

? Access up to 4MB of off-chip program and 32MB of

data memory

? Chip Select Logic for glueless interface to ROM and

SRAM

? 512KB of Program Flash

? 4KB of Program RAM

? 32KB of Data Flash

? 32KB of Data RAM

? 32KB Boot Flash

? Up to two 6-channel PWM modules

? Four 4-channel, 12-bit ADCs

Core

? Efficient 16-bit 56800E family controller engine with dual Harvard architecture

? Up to 60 Million Instructions Per Second (MIPS) at 60MHz core frequency

? Single-cycle 16 × 16-bit parallel Multiplier-Accumulator (MAC)

? Four 36-bit accumulators, including extension bits

? Arithmetic and logic multi-bit shifter

? Parallel instruction set with unique DSP addressing modes

? Hardware DO and REP loops

? Three internal address buses and one external address bus

? Four internal data buses and one external data bus

? Instruction set supports both DSP and controller functions

? Controller-style addressing modes and instructions for compact code

? Efficient C compiler and local variable support

? Software subroutine and interrupt stack with depth limited only by memory

? JTAG/EOnCE debug programming interface

Applications

Mobile applications, Internet of Things

- Wearable devices: smartwatches