NXP MCIMX7D3EVK10SC

ARM® Cortex®-A7, ARM® Cortex®-M41,0 ГГцLPDDR2, LPDDR3, DDR3, DDR3L10/100/1000 Мбит/с (2)-20°C ~ 105°C (TJ)

Overview

MCIMX6X4EVM10AB with pin details, that includes i.MX6SX Series, they are designed to operate with a Tray Packaging, Package Case is shown on datasheet note for use in a 529-LFBGA, it has an Operating Temperature range of -20°C ~ 105°C (TJ), Supplier Device Package is designed to work in 529-MAPBGA (19x19), as well as the 1.8V, 2.5V, 2.8V, 3.15V Voltage I O, the device can also be used as 200MHz, 1GHz Speed. In addition, the Core Processor is ARMR CortexR-A9, ARMR CortexR-M4, the device is offered in 2 Core, 32-Bit Number of Cores Bus Width, the device has a Multimedia; NEON? MPE of Co Processors DSP, and RAM Controllers is LPDDR2, LVDDR3, DDR3, and the Graphics Acceleration is Yes, and Display & Interface Controllers is Keypad, LCD, LVDS, and the Ethernet is 10/100/1000 Mbps (2), and USB is USB 2.0 + PHY (1), USB 2.0 OTG + PHY (2), and the Security Features is A-HAB, ARM TZ, CAAM, CSU, SNVS, System JTAG, TVDECODE.

MCIMX7D3DVK10SC with circuit diagram manufactured by NXP / Freescale. is part of the Embedded - Microcontrollers, , and with support for "ARM Microcontrollers - MCU i.MX 7Dual:2x Cortex A7, ARM? Cortex?-A7, ARM? Cortex?-M4 Microprocessor IC i.MX7D 2 Core, 32-Bit 1.0GHz 488-FBGA (12x12), SOC i.MX 7Dual ARM Cortex A7 488-Pin MAP-BGA Tray, ARM Microcontrollers - MCU i.MX 7Dual:2x Cortex A7, 2x USB 2.0 OTG with PHY, PCIe, 2xSDIO/MMC, 2x Ethernet, Security.

Features

ARM Cortex-A7 plus ARM Cortex-M4—Heterogeneous Multicore Processing architecture enables the device to run an open operating system like Linux/Android on the Cortex-A7 core and an RTOS like FreeRTOS? on the Cortex-M4 core.

Two ARM Cortex-A7 cores—The processor enhances the capabilities of portable, connected applications by fulfilling the ever-increasing MIPS needs of operating systems and applications at the lowest power consumption levels per MHz. 

Multilevel memory system—The multilevel Cortex-A7 memory system is based on the L1 instruction and data caches, L2 cache, and internal and external memory. The processor supports many types of external memory devices, including DDR3, DDR3L, LPDDR2 and LPDDR3, NOR Flash, NAND Flash (MLC and SLC), QSPI Flash, and managed NAND, including eMMC rev.

Power efficiency—Power management implemented throughout the IC enables features and peripherals to consume minimum power in both active and various low-power modes. 

Multimedia—The multimedia performance is enhanced by a multilevel cache system, NEON? MPE (Media Processor Engine) coprocessor, a programmable smart DMA (SDMA) controller.

Up to two Gigabit Ethernet with AVB—10/100/1000 Mbps Ethernet controllers supporting IEEE Std 1588 time synchronization.

Electronic Paper Display Controller (EPDC)—The processor integrates an EPD controller that supports E Ink color and monochrome panels with up to 2048 x 1536 resolution at 106 Hz refresh, 4096 x 4096 resolution at 20 Hz refresh, and 5-bit grayscale (32-levels per color channel)

Applications

Audio

Connected devices

Access control panels

Human-machine interfaces (HMI)

Portable medical and health care

IP phones

Smart appliances

Point of Sale

eReaders

Wearables

Home energy management systems