TI SN74LV4046APWR

Петля фазовой автоподстройки (PLL)ДаCMOS, TTLCMOS, TTL

Overview

The SN74LV4046APWR is a high-speed silicon-gate CMOS device that is pin compatible with the CD4046B and the CD74HC4046. The device is specified in compliance with JEDEC Std 7.

The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the SN74LV4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear operational amplifier techniques. Various applications include telecommunications, digital phase-locked loop and signal generators.

Features

Applications

• 1 Gigabit Ethernet
• 10 Gigabit Ethernet
• FPGA and processor clocks
• Line cards used in telephone exchange
• Fiber Channel
• PCI express cards
• Infotainment systems
• Medical equipment
• Multi-function printers
• Media broadcast servers